鸿蒙轻内核A核源码分析系列六 MMU协处理器（2）

时间:2025/7/9 14:23:02来源：https://blog.csdn.net/maniuT/article/details/139655865 浏览次数:0次

3、MMU汇编代码

在arch\arm\arm\include\arm.h文件中，封装了CP15协处理器相关的寄存器操作汇编函数。我们主要看下MMU相关的部分。

3.1 CP15 C2 TTBR转换表基地址寄存器

代码比较简单，结合下图，自行查看即可。该图来自《ARM Cortex-A9 Technical Reference Manual r4p1》CP15 system control registers grouped by CRn order部分。

STATIC INLINE UINT32 OsArmReadTtbr(VOID)
{UINT32 val;__asm__ volatile("mrc p15, 0, %0, c2,c0,0" : "=r"(val));return val;
}STATIC INLINE VOID OsArmWriteTtbr(UINT32 val)
{__asm__ volatile("mcr p15, 0, %0, c2,c0,0" ::"r"(val));__asm__ volatile("isb" ::: "memory");
}STATIC INLINE UINT32 OsArmReadTtbr0(VOID)
{UINT32 val;__asm__ volatile("mrc p15, 0, %0, c2,c0,0" : "=r"(val));return val;
}STATIC INLINE VOID OsArmWriteTtbr0(UINT32 val)
{__asm__ volatile("mcr p15, 0, %0, c2,c0,0" ::"r"(val));__asm__ volatile("isb" ::: "memory");
}STATIC INLINE UINT32 OsArmReadTtbr1(VOID)
{UINT32 val;__asm__ volatile("mrc p15, 0, %0, c2,c0,1" : "=r"(val));return val;
}STATIC INLINE VOID OsArmWriteTtbr1(UINT32 val)
{__asm__ volatile("mcr p15, 0, %0, c2,c0,1" ::"r"(val));__asm__ volatile("isb" ::: "memory");
}STATIC INLINE UINT32 OsArmReadTtbcr(VOID)
{UINT32 val;__asm__ volatile("mrc p15, 0, %0, c2,c0,2" : "=r"(val));return val;
}STATIC INLINE VOID OsArmWriteTtbcr(UINT32 val)
{__asm__ volatile("mcr p15, 0, %0, c2,c0,2" ::"r"(val));__asm__ volatile("isb" ::: "memory");
}

3.2 CP15 C7 高速缓存寄存器

代码比较简单，结合下图，自行查看即可。该图是C7寄存器的部分截图。

STATIC INLINE UINT32 OsArmReadBpiall(VOID)
{UINT32 val;__asm__ volatile("mrc p15, 0, %0, c7,c5,6" : "=r"(val));return val;
}STATIC INLINE VOID OsArmWriteBpiall(UINT32 val)
{__asm__ volatile("mcr p15, 0, %0, c7,c5,6" ::"r"(val));__asm__ volatile("isb" ::: "memory");
}STATIC INLINE UINT32 OsArmReadBpiallis(VOID)
{UINT32 val;__asm__ volatile("mrc p15, 0, %0, c7,c1,6" : "=r"(val));return val;
}STATIC INLINE VOID OsArmWriteBpiallis(UINT32 val)
{__asm__ volatile("mcr p15, 0, %0, c7,c1,6" ::"r"(val));__asm__ volatile("isb" ::: "memory");
}

3.3 CP15 C13 进程标识符寄存器

代码比较简单，结合下图，自行查看即可。

STATIC INLINE UINT32 OsArmReadContextidr(VOID)
{UINT32 val;__asm__ volatile("mrc p15, 0, %0, c13,c0,1" : "=r"(val));return val;
}STATIC INLINE VOID OsArmWriteContextidr(UINT32 val)
{__asm__ volatile("mcr p15, 0, %0, c13,c0,1" ::"r"(val));__asm__ volatile("isb" ::: "memory");
}

4 MMU上下文切换

在之前的系列，我们了解到每个用户进程都有独立的进程空间。在进程切换时，MMU上下文也会切换，相应的函数为LOS_ArchMmuContextSwitch()。快速分析下该函数的代码。

⑴处读取TTBCR寄存器的状态值，如果传入参数archMmu不为空，执行⑵使能TTBR0，否则执行⑶使其失能TTBR0。⑷处把这里先把asid切到内核空间的ID

VOID LOS_ArchMmuContextSwitch(LosArchMmu *archMmu)
{UINT32 ttbr;
⑴   UINT32 ttbcr = OsArmReadTtbcr();if (archMmu) {
⑵      ttbr = MMU_TTBRx_FLAGS | (archMmu->physTtb);/* enable TTBR0 */ttbcr &= ~MMU_DESCRIPTOR_TTBCR_PD0;} else {
⑶      ttbr = 0;/* disable TTBR0 */ttbcr |= MMU_DESCRIPTOR_TTBCR_PD0;}#ifdef LOSCFG_KERNEL_VM/* from armv7a arm B3.10.4, we should do synchronization changes of ASID and TTBR. */
⑷  OsArmWriteContextidr(LOS_GetKVmSpace()->archMmu.asid);ISB;
#endifOsArmWriteTtbr0(ttbr);ISB;OsArmWriteTtbcr(ttbcr);ISB;
#ifdef LOSCFG_KERNEL_VMif (archMmu) {OsArmWriteContextidr(archMmu->asid);ISB;}
#endif
}